1. Field of the Invention
The present invention relates to segmented circuitry such as, for example, digital-to-analog converters.
2. Description of the Related Art
FIG. 1 of the accompanying drawings shows parts of a conventional digital-to-analog converter (DAC) of the so-called xe2x80x9ccurrent-steeringxe2x80x9d type. The DAC 1 is designed to convert an m-bit digital input word (D1-Dm) into a corresponding analog output signal.
The DAC 1 includes a plurality (n) of identical current sources 21 to 2n, where n=2mxe2x88x921. Each current source 2 passes a substantially constant current I. The DAC 1 further includes a plurality of differential switching circuits 41 to 4n corresponding respectively to the n current sources 21 to 2n. Each differential switching circuit 4 is connected to its corresponding current source 2 and switches the current I produced by the current source either to a first terminal, connected to a first connection line A of the converter, or a second terminal connected to a second connection line B of the converter.
Each differential switching circuit 4 receives one of a plurality of control signals T1 to Tn (called xe2x80x9cthermometer-coded signalsxe2x80x9d for reasons explained hereinafter) and selects either its first terminal or its second terminal in accordance with the value of the signal concerned. A first output current IA of the DAC 1 is the sum of the respective currents delivered to the differential-switching-circuit first terminals, and a second output current IB of the DAC 1 is the sum of the respective currents delivered to the differential-switching-circuit second terminals.
The analog output signal is the voltage difference VA-VB between a voltage VA produced by sinking the first output current IA of the DAC 1 into a resistance R and a voltage VB produced by sinking the second output current IB of the converter into another resistance R.
In the FIG. 1 DAC the thermometer-coded signals T1 to Tn are derived from the binary input word D1-Dm by a binary-thermometer decoder 6. The decoder 6 operates as follows.
When the binary input word D1-Dm has the lowest value the thermometer-coded signals T1-Tn are such that each of the differential switching circuits 41 to 4n selects its second terminal so that all of the current sources 21 to 2n are connected to the second connection line B. In this state, VA=0 and VB=nIR. The analog output signal VA-VB=xe2x88x92nIR.
As the binary input word D1-Dm increases progressively in value, the thermometer-coded signals T1 to Tn produced by the decoder 6 are such that more of the differential switching circuits select their respective first terminals (starting from the differential switching circuit 41) without any differential switching circuit that has already selected its first terminal switching back to its second terminal. When the binary input word D1-Dm has the value i, the first i differential switching circuits 41 to 4i select their respective first terminals, whereas the remaining nxe2x88x92i differential switching circuits 41+1 to 4n select their respective second terminals. The analog output signal VA-VB is equal to (2ixe2x88x92n)IR.
FIG. 2 of the accompanying drawings shows an example of the thermometer-coded signals generated for a three-bit binary input word D1-D3 (i.e. in this example m=3). In this case, seven thermometer-coded signals T1 to T7 are required (n=2mxe2x88x921=7).
As FIG. 2 shows, the thermometer-coded signals T1 to Tn generated by the binary-thermometer decoder 6 follow a so-called thermometer code in which it is known that when an rth-order signal Tr is activated (set to xe2x80x9c1xe2x80x9d), all of the lower-order signals T1 to Tr-1 will also be activated.
Thermometer coding is popular in DACs of the current-steering type because, as the binary input word increases, more current sources are switched to the first connection line A without any current source that is already switched to that line A being switched to the other line B. Accordingly, the input/output characteristic of the DAC is monotonic and the glitch impulse resulting from a change of 1 in the input word is small.
It will be appreciated that the number of current sources 2 and corresponding differential switching circuits 4 in the FIG. 1 architecture is quite large, particularly when m is greater than or equal to 6. When m=6, for example, n=63, and 63 current sources and 63 differential switching circuits are required. In order to deal with such a large number of current sources, and to enable the thermometer signals to be delivered efficiently to the different differential switching circuits, it has been proposed to arrange the current sources and differential switching circuits as a two-dimensional array of cells, each cell including one current source and its associated differential switching circuit. This arrangement is shown in FIG. 3 of the accompanying drawings.
In FIG. 3, 64 cells CLij are arranged in an 8xc3x978 square array having eight rows and eight columns. In FIG. 3, the first digit of the suffix applied to each cell denotes the row in which the cell is located and the second digit of the suffix denotes the column in which the cell is located. Thus, the cell CL18 is the cell in row 1, column 8.
Each cell CLij includes its own current source 2 and its own differential switching circuit 4. The respective first terminals of the cells of the array are connected together to a first connection line A of the DAC and the respective second terminals of the cells of the array are connected together to a second connection line B of the DAC, as in the FIG. 1 DAC.
The numbers allotted to the cells CLij in FIG. 3 denote the sequence in which the cells are activated (or controlled) to change from selecting their respective second terminals to selecting their respective first terminals. The activation sequence follows the physical order of the cells in the array, starting from row 1 and activating the cells of that row sequentially in column order, followed by row 2, and so on for each successive row of the array.
One problem which arises in the FIG. 3 arrangement is that, although the output currents of the respective current sources 2 of the different cells of the array should be uniform, in practice the actual output currents of the cells suffer from non-uniformity arising from various causes.
For example, a voltage drop along a power supply line can cause a graded error along a row or column, as shown in FIG. 4(A) of the accompanying drawings. In this case, the current sources in the first four cells of the row or column concerned may have negative errors, signifying that each of them produces a below-average output current. These negative errors decrease towards the centre of the row or column concerned. The current sources in the remaining cells 5 to 8 of the row or column concerned have respective positive errors, signifying that each of them produces an above-average output current. These positive errors increase from the centre of the row or column to the end.
Thermal distribution inside a chip including the array can cause a symmetrical error within a row or column, as shown in FIG. 4(B) of the accompanying drawings. In this case, the current sources in the end cells 1, 2, 7 and 8 of the row or column have negative errors, whereas the current sources of the central cells 3 to 6 of the row or column have positive errors.
In addition, there can be other types of error such as random errors, discussed in more detail below. The final error distribution for the cell array is produced by superposing all the different error components.
The graded and symmetrical errors shown in FIG. 4(A) and FIG. 4(B) tend to accumulate and result in a large integral linearity error (INL). For example, imagine that the graded error distribution shown in FIG. 4(A) exists within the first row of the cell array shown in FIG. 3. In this case, as cells 1 to 4 are progressively activated (changed from selecting their respective second terminals to selecting their respective first terminals) the negative errors accumulate, amounting to a significant total negative error when the digital input code is 4. Only when cells 5 to 8 are sequentially activated do the positive errors attributable to these cells start to cancel out the large negative error attributable to cells 1 to 4.
Of course the situation is even worse if there are graded errors corresponding to FIG. 4(A) along each of the columns 1 to 8. In this case, as cells 1 to 8 are progressively activated, the largest negative error (the error at position 1 in FIG. 4(A)) occurs for each of the eight cells of row 1. Similarly, in row 2, negative errors corresponding to position 2 in FIG. 4(A) accumulate eight times. Thus, by the time the input code has increased to 32 (corresponding to all of the cells in rows 1 to 4 being activated) the accumulated negative error is very large indeed.
Similar problems arise with the accumulation of symmetrical errors of the kind shown in FIG. 4(B).
Mismatches due to graded and symmetrical errors can be reduced by selecting the cells in a special sequence different from the sequence in which they are arranged physically in the cell array. In particular, a special cell selection sequence conforming to the sequence of numbers in a so-called xe2x80x9cmagic squarexe2x80x9d is described in the assignee""s U.S. Pat. No. (CPA) 6,236,346, the entire content of which is incorporated herein by reference.
However, even when such a special cell selection sequence is employed, there inevitably remains a mismatch between the respective currents produced by the different segments. This in turn causes non-linearity in the performance of the DAC.
It has been proposed in a paper entitled xe2x80x9cStructural Optimization and Scaling of SC Delta-Sigma ADCSxe2x80x9d, Jesper Steensgaard, Delta-Sigma Data Converters Lecture Course, Mar. 16-19, 1999, San Diego, Calif., to employ element (or segment) rotation to shape mismatches between the elements of a DAC. In this proposal, the elements are rotated using data-directed rotation amounts. Another paper from the same lecture course, entitled xe2x80x9cMismatch-Shaping Multibit DACs for Delta-Sigma ADCs and DACs, Ian Galton, discloses mismatch shaping techniques which move noise from low frequencies to high frequencies to improve the noise shape. In these techniques the noise increases rapidly with frequency at high output-signal frequencies, so large oversampling ratios (e.g. 8 or 25) must be used to obtain useful results. A further paper from the same lecture course, entitled xe2x80x9cUnconventional Applications of Noise-Shaping Techniquesxe2x80x9d, Bob Adams, discloses that element xe2x80x9cscramblingxe2x80x9d can be employed in a sigma-delta DAC to turn distortion into shaped noise. The scrambling can be either random, which distributes the noise evenly across the entire frequency spectrum both within and outside the desired range of frequencies of the output signal, or data-directed which moves the noise away from DC but has noise that increases in amplitude progressively with frequency.
A technique has also been proposed, in the assignee""s European patent publication no. EP-A-1100203 (corresponding to the assignee""s co-pending U.S. patent application Ser. No. 09/708677), the entire content of which is incorporated herein by reference, which employs segment rotation, by amounts which are not data-directed, to shape mismatches between the segments of a DAC in order to shift noise out of a particular band of interest.
The above-described techniques are employed in order to overcome or alleviate the problems caused by graded, symmetrical and random errors in the segment sources of a particular device. However, there still remains a significant variation in performance from one device to the next due to the random source mismatches, as will now be described in more detail.
FIG. 5(A) of the accompanying drawings is a graph in which line S illustrates how an analog output signal varies with the binary input signal D1-Dm in an example bipolar DAC device. Line L1 represents the ideal input-output behaviour in such a device, where the analog output accurately follows the digital input in a linear fashion. As described above, in a real device various errors are inevitably present which cause the actual output analog signal to depart from ideal (line L1), as follows. The errors have been exaggerated for the purposes of this illustration.
An offset error causes the idealised output signal represented by line L1 to shift up by a certain amount EO for all digital input values, as illustrated by line L2. A gain error alters the gradient of the response curve to cause the offset error line L2 to rotate by an amount EG as illustrated by line L3. Finally, residual errors such as random errors, arising from source mismatches, cause the actual analog output signal to depart from line L3 by residual (random) error amounts ER which vary as the binary input signal varies. The lines L1, L2 and L3 are of course artificial representations used for the purposes of this explanation, with the line L3 drawn so as to pass through the actual analog output signal values (A and D in FIG. 5(A)) at the extremities of the digital input range.
FIG. 5(B) of the accompanying drawings is a plot corresponding to FIG. 5(A) but showing the difference in output-signal value between lines S and L3 in FIG. 5(A) as the digital input signal is varied. Thus, the plot of FIG. 5(B) represents graphically the extent of the departure of the actual output signal of FIG. 5(A) from linearity; FIG. 5(B) does not take into account the offset and gain errors EO and EG mentioned above. The plot in FIG. 5(B) therefore shows the departure from the artificial linearity represented by line L3 which is constructed so as to be coincident with line S at points A and D, and not the departure from the ideal linearity represented by line L1. The plot in FIG. 5(B) also returns to zero at points B and C where the line S crosses line L3.
Such a plot as that in FIG. 5(B) for a particular DAC device is referred to herein as the xe2x80x9ctransfer functionxe2x80x9d of the device. Since the horizontal axis represents a digital input signal incrementing by discrete steps, the transfer function actually varies in a stepwise fashion.
An equation defining the transfer function (non-linearity error) E can be derived by considering the FIG. 1 DAC in more detail. Although the n current sources 21 to 2n ideally generate identical currents I, in practice the current sources will have respective current errors e1 to en which may be positive, negative or zero. The DAC of FIG. 1 has a differential output signal IA-IB, where for a digital input-signal value (D1-Dm) of x:                               I          A                =                              ∑                          i              =              1                        x                    ⁢                      (                          I              +                              e                i                                      )                                                            I          B                =                              ∑                          i              =                              x                +                1                                      n                    ⁢                      (                          I              +                              e                i                                      )                              
with associated errors E(IA) and E (IB) given respectively by:                               E          ⁡                      (                          I              A                        )                          =                              ∑                          i              =              1                        x                    ⁢                      e            i                                                            E          ⁡                      (                          I              B                        )                          =                              ∑                          i              =                              x                +                1                                      n                    ⁢                      e            i                              
such that the overall error E(I) is given by:   μ  =            (                        ∑                      i            =            1                    n                ⁢                  e          i                    )        /    n  
In this expression for the error E(I), the offset error EO described above with reference to FIG. 5(A) has been ignored. The gain error EG described above with reference to FIG. 5(A) can also be eliminated from this expression for E(I) by considering the mean xcexc of the errors e1 to en:       E    ⁡          (      I      )        =            E      ⁡              (                              I            A                    -                      I            B                          )              =                            E          ⁡                      (                          I              A                        )                          -                  E          ⁡                      (                          I              B                        )                              =                                    ∑                          i              =              1                        x                    ⁢                      e            i                          -                              ∑                          i              =                              x                +                1                                      n                    ⁢                      e            i                              
A non-zero value of the mean xcexc for a device causes the gain error EG described above with reference to FIG. 5(A), since every current source contributes, on average, an error of xcexc to the line A or B to which it is connected, resulting in an overall change in the slope of the input-output response. The gain error EG can be eliminated from the expression for the error E(I) by subtracting the mean error xcexc from each of the current source errors ei as follows.
The sum of the errors (relative to the mean error xcexc) of current sources 21 to 2x connected to line A is:       E    A    =            ∑              i        =        1            x        ⁢          (                        e          i                -        μ            )      
Similarly, the sum of the errors (relative to the mean error xcexc) of current sources 2x+1 to 2n connected to line B is:       E    B    =            ∑              i        =                  x          +          1                    n        ⁢          (                        e          i                -        μ            )      
Thus, the transfer function E can be expressed as:                     E        =                              E            A                    -                      E            B                                                  E        =                                            ∑                              i                =                1                            x                        ⁢                          e              i                                -                      x            ⁢                          xe2x80x83                        ⁢            μ                    -                      (                                                            ∑                                      i                    =                                          x                      +                      1                                                        n                                ⁢                                  e                  i                                            -                                                (                                      n                    -                    x                                    )                                ⁢                μ                                      )                                                  E        =                                            ∑                              i                =                1                            x                        ⁢                          e              i                                -                                    ∑                              i                =                                  x                  +                  1                                            n                        ⁢                          e              i                                +                                    (                              n                -                                  2                  ⁢                  x                                            )                        ⁢            μ                              
When x=0, all of the errors e1 to en are connected to line B which means that EA is zero. EB is also zero because by definition the sum of the line-B errors e1 to en is simply equal to n times the mean error xcexc. Thus, E=0 as represented by point A in FIG. 5(B).
Similarly, when xxe2x88x92n, all of the errors e1 to en are connected to line A which means that EB is zero. EA is also zero because the sum of the line-A errors e1 to en is by definition nxcexc. Thus, again E=0 as represented by point D in FIG. 5(B).
For all other values of x, the errors will be connected in different combinations to lines A and B with the result that the transfer function E is in the form of a xe2x80x9crandom walkxe2x80x9d which always starts and ends at zero and can be positive, negative or zero at points in between.
When the input value changes from xxe2x88x921 to x, the current source 2x changes from being connected to line B to being connected to line A, increasing EA by (exxe2x88x92xcexc) and decreasing EB by (exxe2x88x92xcexc). Thus, each step in the random walk of the transfer function E is 2 (exxe2x88x92xcexc).
Accordingly, the transfer function E can be regarded as the accumulated current-source errors, relative to the mean current-source error, for the particular DAC device. Choosing to make E zero at x=0 and n is simply equivalent to choosing to draw a line L3 through the actual output-signal values at points A and D in FIG. 5(A).
The transfer function causes unwanted distortion in the output of a DAC, to varying degrees and effects according to the exact shape of the transfer function. For example, a transfer function of the form shown in FIG. 6(A), which bows upwards (or downwards) in a single arc, will lead to the generation of unwanted second harmonics in the output signal. A transfer function of the form shown in FIG. 6(B), which is an S-shape passing through the zero-error axis at or near the mid-point, will lead to the generation of unwanted third harmonics in the output signal.
The current-source errors ei conform to a Gaussian (or normal) distribution. When DAC devices are manufactured the transfer functions E of the manufactured devices will also differ one from the next in accordance with the Gaussian distribution of current-source errors.
FIG. 7(A) of the accompanying drawings shows the transfer functions of six example DACs. In each individual DAC device the current source errors conform to a Gaussian distribution, and the current-source error distribution will be similar from one device to the next but with some deviation between devices, as shown in FIG. 7(B) of the accompanying drawings. The more segments there are in each device, the more similar the current source error distributions of different devices will be, but since the errors will be arranged (or selected) in a different order from one device to another, the transfer function of one device will almost always be different from that of another.
As a result of the fact that the transfer function differs from device to device, so too will the distortion in the output signal differ from device to device under the same input signal conditions. For example, for a DAC generating as its output signal a 100 MHz sine wave, the second harmonic would be a discrete tone at 200 MHz with a typical amplitude of, for example, xe2x88x9255 dBc (i.e. xe2x88x9255 dB relative to the main signal). However, since the transfer function is not the same from device to device as explained above, the amplitude of this second harmonic will typically vary from device to device by up to xc2x110 dB. Other distortion components caused by the non-linear output response of the device will also vary from device to device by a similar magnitude.
This device-to-device performance variation of several dB either side of typical has important consequences in terms of the manufacturing yield which can be achieved for the device.
From the point of view of the manufacturer of the devices, an assessment needs to be made of a trade-off between device yield and guaranteed minimum device performance (for example, a minimum signal-to-noise ratio in a particular frequency band of interest). Device-to-device performance variation means that the minimum performance must be specified as several dB worse than typical. One implication of this is that production testing and screening is required. Even allowing for some yield loss to reject the worst devices, the specification has to be reduced. Based on well-known device yield curves, it is known, for example, that if a guaranteed minimum noise performance figure is quoted based on a xe2x80x9cmean-2"sgr"xe2x80x9d figure (produced by subtracting twice the standard deviation "sgr" from the mean value), approximately 97% of manufactured devices will meet or exceed the guaranteed performance, i.e. the yield will be 97%.
If, instead of using a xe2x80x9cmean-2"sgr"xe2x80x9d figure, the manufacturer quotes the guaranteed performance based on a more modest xe2x80x9cmean-3"sgr"xe2x80x9d figure, the yield will increase to 99.9%, making the unit cost lower, but of course the quoted performance will also be lower, making the device less attractive to customers. If the manufacturer quotes the guaranteed performance based on a more demanding xe2x80x9cmean-3"sgr"xe2x80x9d figure, the yield will drop to approximately 84%, raising the unit cost, but the quoted performance will be higher, making the device more attractive to customers. The xe2x80x9cmean-2"sgr"xe2x80x9d figure is often a sensible trade-off, in that it gives an attractive performance level for customers whilst keeping the yield desirably high so that the unit cost is economic.
It is therefore desirable from the manufacturer""s point of view to reduce a device-to-device performance variation caused by differing transfer functions, so as to permit a better minimum performance to be specified by the manufacturer and/or an improved yield for a given minimum performance level.
In practice, it can often be difficult to assess the effects of using the above-mentioned techniques on the distortion components caused by segment mismatches, and empirical checks may be desired in order to select the most appropriate parameters to suit a particular application, or alternatively to test that the desired effect is being achieved by a particular set of parameters. It is therefore desirable to provide a means of facilitating the empirical selection or confirmation of such parameters.
An embodiment of one aspect of the present invention provides mixed-signal circuitry which is operative to perform a series of operation cycles. n circuitry segments together produce an analog output signal. Control signal generating circuitry is operable in each cycle to generate, in dependence upon a digital input signal, a set of n segment control signals for application to respective ones of the segments to influence the produced analog output signal. Morphing circuitry causes the n segment control signals to be applied to the n segments in at least two different orders at different respective times. At least one order differs from the next order by more than a starting ordinal position amongst the segments and that the changes in ordinal position of the segments brought about by the changes in order of application of the segment control signals are limited in number and/or magnitude relative to the number n of segments.
An embodiment of another aspect of the present invention provides a noise shaping method for use in such mixed-signal circuitry.
There are many different ways in which the number and/or magnitude of the ordinal position changes can be limited.
In terms of numbers of segments, in one embodiment, for each change in order there is at least one segment that is not changed in ordinal position. In another embodiment, for each change in order at least n/16 segments are not changed in ordinal position. In other embodiments, the numbers of segments changing are limited further still. For example, for each change in order at most n/2 segments may have a change in ordinal position, or at most a pair of segments may change ordinal position.
It is also possible to express the limitation in terms of an overall extent of the changes of ordinal position brought about by each change in order. For example, each change from one order to the next may be considered to have an associated segment change parameter, calculated by summing over all n segments the respective ordinal position changes, if any, brought about by the change in order concerned. The limits may then be expressed in terms of the values of the segment change parameters. In one embodiment the respective segment change parameters associated with the changes in order are each less than n2/4, more preferably each less than or equal to 16 n, and more preferably still each less than 2 n. In another embodiment an average value of the segment change parameter per cycle is less than n2/64, more preferably less than 16 n, and more preferably still less than 2 n. In another embodiment a difference between respective minimum and maximum values of the segment change parameter is limited relative to the number n of segments. For example, the difference may be less than n2/64, more preferably less than 16 n, and more preferably still less than 2 n. It may even be zero.
In practice, to keep complexity down the order of application of the segment control signals to the segments in any one cycle is preferably selected from among a plurality of predetermined available orders. The total number of predetermined available orders is preferably greater than 4, more preferably greater than n. The higher the number of available orders the greater the reduction in transfer function variation.
Each one of the predetermined available orders may be selected in turn in a predetermined order but preferably, to reduce the magnitudes of the noise components (whilst spreading them out), each one of the available orders is selected on a random or pseudo-random basis. In one embodiment, changes in order that involve more limited overall changes in ordinal position are caused to occur on average more often than changes in order that involve greater overall changes in ordinal position. This helps to keep a limit on the variation in value of the segment change parameter. In another embodiment the predetermined available orders are such that all changes in order involve approximately the same overall changes in ordinal position, i.e. approximately the same value of segment change parameter, and all changes in order are caused to take place on average with approximately the same frequencies.
One preferred way of changing the orders without making the circuitry too complex, and without the overall changes in ordinal position being too large, is swap the respective ordinal positions of segments belonging to one or more preselected pairs of segments.
An amount by which the noise components are spread out is influenced by an average time interval between repetitions of a given change in order. In one embodiment this average time interval is at least 0.1 xcexcs.
The n segments may be sub-divided into m groups of segments, where mxe2x89xa72. In one embodiment m=8 or 16 when n=128. When groups are formed the ordinal positions of segments belonging to the same group only may be changed, e.g. swapped. In this case, to limit the numbers of segments that change ordinal position changes in ordinal position may be permitted in mxe2x88x921 or fewer of the m groups at any one time, for example in only one group at any one time. In order that segments can move to ordinal positions spanning over the range of n possible ordinal positions when the orders are changed, the ordinal positions of segments belonging to the same group are preferably spread out (e.g. evenly) over the range of n possible ordinal positions.
An embodiment of another aspect of the present invention provides segmented circuitry which comprises a plurality of circuitry segments, each having a first analog quantity defining portion which defines a first analog quantity for its segment, and also having a second analog quantity defining portion which defines a second analog quantity for its segment. The second analog quantity is less well-defined than the first analog quantity for the segment concerned. Analog quantity selecting circuitry selects the first analog quantities or the second analog quantities. Combining circuitry produces a combined analog quantity based on the respective selected analog quantities of a combination of the circuitry segments.
The segmented circuitry described above may also be operative to perform a series of operation cycles, and in this case may further comprise control signal generating circuitry which in each cycle generates, in dependence upon a digital input signal, a set of segment control signals for application to respective ones of the segments to influence the combined analog quantity. Noise shaping circuitry causes the segment control signals to be applied to the segments in at least two different orders at different respective times, thereby to convert distortion, caused by mismatches between the first analog quantities of different segments, into noise components at preselected desired frequencies.
In a method of testing this segmented circuitry according to an embodiment of another aspect of the present invention, the analog quantity selecting circuitry is caused to select the second analog quantities, the operating parameters of the noise shaping circuitry, used by the noise shaping circuitry to influence the different orders, are set, and measurements are carried out on a signal derived from the combined analog quantity so as to identify the positions in a frequency spectrum of that signal of the noise components.